Schottky barrier based MOSFETS, CMOS, gate voltage controled direction of rectification, and single device inverting and single device non-inverting MOS semiconductor devices which demonstrate operating characteristics similar to those of multiple device Complimentary Metal Oxide Semiconductor (CMOS) systems have been previously described in U.S. Pat. No. 5,663,584. Semiconductor devices described in said 584 patent operate on the basis that materials exist which produce a rectifying junction with semiconductor channel regions when they are doped either N or P-type, whether said doping is achieved via metallurgical or field induced means. Presently disclosed semiconductor devices also have a similar basis of operation.
Continuing, particularly in Metal Oxide Semiconductor Field Effect Transistors Systems, (MOSFETS), (but not limited thereto), the avoidance of unintended parasitic current flow pathways is of great concern during design, testing and application. (MOSFETS), it is noted, operate by effectively inverting doping type in a "Channel" region beneath a Gate by application of a voltage to said Gate. The Channel region is typically, in use, modulated to a very conductive state so that it can carry current. It also occurs, however, that interconnection traces between intended devices, can act as unintended "Effective Gates" and cause current carrying, parasitic, inverted doping type conducting "Channel" regions between unintended points in a semiconductor system. Such unintended current flow pathways can completely disrupt intended semiconductor circuit operation. A system and method which would allow easy and convenient blocking of such unintended current flow pathways would therefore be of utility.
Further relevant background is found in the cited U.S. Pat. No. 5,663,584 to Welch, said patent being incorporated by reference hereinto along with co-pending patent application Ser. No. 08/578,336. Said 584 patent identifies patents to Lepselter, U.S. Pat. No. 4,300,152; Koeneke et al., U.S. Pat. No. 4,485,550; Welch, U.S. Pat. No. 4,696,093; Mihara et al., U.S. Pat. No. 5,049,953 and Homna et al. U.S. Pat. No. 5,177,568. It is noted that the 152 patent points out that SCR-type latchup is avoided where a MOSFET in a CMOS pair is a Schottky barrier based device. A relevant article titled "SB-IGFET: An Insulated Gate Field Effect Transistor using Schottky Barrier Contacts for Source and Drain", by Lepselter & Sze, Proc IEEE, 56, January 1968, pp. 1400-1402, is also identified in said 584 patent. Also mentioned, and included herein by reference for general insight to semiconductor circuits and systems, is a book titled "Microelectronic Circuits" by Sedra and Smith, Saunders College Publishing, 1991.
In view of the fact that the semiconductor industry market has shown strong continuous growth and grew to approximately one-hundred-thirty-nine billion dollars in 1996, and in view of the fact that continued growth relies on new innovation and implementation of semiconductor systems which demonstrate improvement in packing density, ease of fabrication and operational performance, there remains need for new semiconductor system technology. In that light, the present invention presents innovation in the use of materials which produce rectifying junctions in semiconductor which is doped either N or P-type.